发明名称 |
DELAY GENERATOR AND ITS METHOD, CLOCK RECOVERY SYSTEM |
摘要 |
PURPOSE: To provide a delay generator sufficiently stable to temperature and secular change by providing an impressing means which impresses an instantaneous voltage substantially equal to the voltage of an input signal to a delay line, and a difference voltage generating means which generates a difference voltage between the voltage of the input signal and a voltage between the terminals of the delay line. CONSTITUTION: A delay line 20 is provided with a characteristic impedance Z0 , and one end is terminated with an impedance opposite to the characteristic impedance Z0 . A means equipped with transistors 23 and 24 impresses an instantaneous voltage substantially equal to a voltage v(t) of an input signal to an input terminal 22. The transistor 24 operates as a difference voltage generating means which outputs a voltage difference between the voltage v(t) of the input signal and a voltage vL(t) of the input terminal 22 of the delay 20. The transistor 24 operates as a voltage follower amplifier, and makes the voltage vL(t) substantially equal to the instantaneous voltage of the voltage v(t) of the input signal with the transistor 23 operating as a current source to be controlled. Thus, a delay generator stable to temperature and secular change can be obtained. |
申请公布号 |
JPH03139914(A) |
申请公布日期 |
1991.06.14 |
申请号 |
JP19900270672 |
申请日期 |
1990.10.11 |
申请人 |
AMERICAN TELEPH & TELEGR CO <ATT> |
发明人 |
YOHANESU JIERAADASU RANSHIJIN |
分类号 |
H03K5/14;H04L7/00;H04L25/40 |
主分类号 |
H03K5/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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