Pattern recognition implementation structure - contains computer unit with memory, line delay unit and pixel delay unit

摘要

The structure for implementing morphological operations and pattern recognition contains a computation unit with a memory (2) and a connected line delay unit (3) for implementation of image processing techniques. The structure can contain a pixel delay unit. The memory is a RAM, ROM, EPROM, EEPROM OR PROM. Controlled FIFOs are used for line delay and pixel delay is achieved using shift registers or controlled FIFOs. USE/ADVANTAGE - Flexible hardware structure enables simple and effective implementation of almost all types of morphological methods or pattern recognition within defined window size.