| 摘要 |
<p>PURPOSE:To set a reset period with high accuracy by setting the reset period by using a counter circuit and an SR flip-flop. CONSTITUTION:The counted value of a counter circuit 106 is cleared for a period wherein the output of a hysteresis circuit 105 is at low level to reset the output of the SR flip-flop SR 107 to the low level and a microprocessor and a peripheral circuit 108 are put in reset states until the output of the SR flip-flop 107 is reset to high level. When a clock signal 112 is generated and the counter circuit 106 reaches a specific counted value, the counter output goes down to the low level and the SR flip-flop 107 goes up to the high level, so that the period wherein the output of the SR flip-flop 107 is at the low level is the time of the resetting operation of the microprocessor and peripheral circuit 108. Consequently, the reset period can accurately be set.</p> |
