摘要 |
In a circuit arrangement for controlling a liquid crystal display device with pixels in a grid array, in which video signals (R, G, B) and horizontal and vertical frequency synchronous pulses (H, V) can be supplied to an integrated control circuit, there is a controllable oscillator with a phase comparator circuit and a frequency divider to derive a beat signal. In addition, to the control circuit may be supplied a time control signal (DTMG) which essentially assumes a first logic level during the active lines of the video signal and a second logic level during the horizontal and line frequency synchronous pulses and subsequent predetermined times.
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申请人 |
ROBERT BOSCH GMBH, 7000 STUTTGART, DE |
发明人 |
WIEDEMANN, WERNER, DIPL.-ING., 8522 HERZOGENAURACH, DE;FABER, DIETER, DIPL.-ING., 8561 REICHENSCHWAND, DE;HOVESTADT, UWE, DIPL.-ING., 8542 ROTHAURACH, DE |