BASIC ELEMENT FOR THE CONNECTION NETWORK OF A FAST PACKET SWITCHING NODE

摘要

Basic element for the interconnection network of a fast packet switching node, where a synchronization is made at bit input stream level, the cell beginning is identified and a stream conversion from the serial form to a word parallel form is performed. Cells are thus transformed in a completely parallel form and in the same form they are cyclically discharged in the subsequent cell time in a memory (BC), where cells are written and read in a shared way on the basis of instructions given by a control unit (CC), thus performing the switching function. The control unit is essentially based on the use of a content-addressed associative memory, where a fraction of the routing header and a code indicating the time sequence on which the cells arrive are stored. Memory outgoing cells are reconverted from a completely parallel form to a form having the length of one word and therefore in a completely serial form at a bitrate equal to the input one.