发明名称 PACKAGE FOR SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To add a capacitor in large capacity to a semiconductor integrated circuit by a method wherein the title package for semiconductor integrated circuit is provided with the first conductor layer to mount a semiconductor integrated circuit thereon and the second conductor layer electrically insulated from the first conductor layer to be formed opposite to the same while the second conductor layer is electrically connected to the semiconductor integrated circuit. CONSTITUTION:The first conductor layer 2 comprising a conductor such as a metal etc., is provided on a die area whereon a semiconductor integrated circuit 1 is mounted. The second conductor layer 3 is formed beneath the first conductor layer 2 opposite to the same 2. The second conductor layer 3 is formed of the conductor such as the metal etc., while a dielectric such as ceramics etc., forming a package main body 5 is laid between the first conductor layer 2 and the second conductor layer 3 so as to electrically insulate said two conductor layers 2 and 3. Accordingly, a capacitor using the first and second conductor layers 2, 3 as pole plates is to be formed. Within the capacitor thus formed, the first and second conductor layers 2, 3 to be the pole plates of the capacitor can be formed in the same size as that of the die area so that a large capacity may be attained.
申请公布号 JPH03136352(A) 申请公布日期 1991.06.11
申请号 JP19890275614 申请日期 1989.10.23
申请人 SUMITOMO ELECTRIC IND LTD 发明人 INANO SHIGERU
分类号 H01L23/12;H01L21/52;H01L25/00 主分类号 H01L23/12
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