| 摘要 |
An integrated circuit, D-type master-slave flipflop includes a bistable master element connected between two supply voltage terminals and having a first data input for receiving data. A control means is provided having a control signal input for erasing or writing into the master element under the control of a control signal. A bistable slave element is connected between the two supply voltage terminals and has a second data input connected to a data output of the master element. The slave element is directly controlled by signals on the second data input for enabling writing into the slave element after an output signal at the master element data output reaches a predetermined voltage level.
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