发明名称 ARITHMETIC PROCESSING UNIT
摘要 PURPOSE:To shorten the processing time of an arithmetic processing by storing the code bit of an operated result outputted from an arithmetic and logic operation unit in a first register and simultaneously storing the operated result or a fixed constant in a second register in accordance with the value of the code bit. CONSTITUTION:The code bit of the operated result outputted from the arithmetic and logical operation unit 3 is stored in the first register 4 and the operated result is stored in the second register 5 in accordance with the value of the code bit or the fixed constant through an internal data bus 6. Consequently, the limitter processing of the operated result can be executed by one instruction by executing a MOVE instruction with a certain condition by an instruction for executing the processing. Thus, the processing time of the arithmetic processing can be shortened.
申请公布号 JPH03135209(A) 申请公布日期 1991.06.10
申请号 JP19890273324 申请日期 1989.10.20
申请人 NEC CORP 发明人 TAZAKI CHIORI
分类号 G06F7/00;H03G11/00 主分类号 G06F7/00
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