摘要 |
PURPOSE: To turn respective multiplication steps used for generating a quotient numerical value to functions simpler than full accuracy multiplication by directly determining the respective quotient numerical values by multiplying a partial remainder to the short reciprocal of a divisor in a multiplier and performing the appropriate round-down of a result and successively determining the quotient numerical values by an accurate remainder. CONSTITUTION: A multiplicand is passed through a first multiplexer 40 and inputted to a multiplier array 42, the 18 bits of a multiplier are input from a second multiplexer 44 and inputted to the short side of the multiplier array 42 and the product of the multiplier and the multiplicand is provided with the numerical value of 87-bit length. The product value is sent through a first adder 46 and a second shifter 55 to a result register 56 as it is and the product is then inputted to an E latch 38, sent to a system bus 32 there and outputted from an arithmetic coprocessor. In such a manner, a divided number is started from the rough calculation of the reciprocal of the divisor and the digit of a quotient is continuously obtained by multiplying the approximate value of the reciprocal to the partial remainder at present. Thus, the successive full accuracy multiplication used for eliminating indeterminateness in Newton-Raphson quotient approximation is saved. |