Method of forming a conductive via plug or an interconnect line of ductile metal within an integrated circuit using mechanical smearing.

摘要

A method of forming a conductive via plug or an interconnect line, or both, of ductile metal within an integrated circuit using mechanical smearing. The process begins with a wafer having a dielectric layer (16), the upper surface of which has been planarized. If both conductive via plugs and interconnect lines are both required within the circuit, a first photomask (17) defines the interconnect lines. A first etch creates channels (18) in the interconnect line locations. A second photomask (19) defines the vias. A second etch creates the vias (20) which pass through the dielectric layer to conductive regions (14) below where contact is to be made. A ductile metal layer (21) is then deposited on top of the dielectric layer (16). The ductile metal layer (21) is then mechanically smeared or deformed in order to force metal from that layer more deeply into the channels (18) and vias (20). The wafer is then slurry polished until all excess metal is removed and the via and channel topography is coplanar with the dielectric layer surface. At this point conductive via plugs (22) and interconnect lines (23) are fully formed. <IMAGE>