发明名称 DECODING SYSTEM FOR TREE STRUCTURE VARIABLE LENGTH CODE
摘要 <p>PURPOSE:To make the capacity of a conversion table ROM small by tracing a node of a tree table with a variable length code string comprising an inputted optional length of digits, reading a data of an address assigned to the node and discriminating whether the node is an intermediate node or a termination node depending on a flag data corresponding to a node address. CONSTITUTION:An N-digit address is generated from (N-1) digits in common to sets of nodes branched at first from a start node and a 1st digit being a variable length of code in the decoding of the variable length code comprising optional length of digits and the address is used to read a data of the node (of a tree table). Whether the node is a termination node or an intermediate node is discriminated by a flag digit of the readout data. The decoded data represented by m-digit is outputted in the case of the termination node. The data of high-order 3 bits (high-order address being a data content of the intermediate node) is inputted to a register 2 among 8-bit output data in a ROM 1 and a flag data (flag bit) in 1-bit of the ROM 1 is a reset pulse of the register 2.</p>
申请公布号 JPH03131176(A) 申请公布日期 1991.06.04
申请号 JP19890268810 申请日期 1989.10.16
申请人 VICTOR CO OF JAPAN LTD 发明人 YAMADA YASUHIRO;NIIHARA TAKAMIZU
分类号 H04N19/00;H04N1/419;H04N19/423;H04N19/426;H04N19/44;H04N19/91 主分类号 H04N19/00
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