发明名称 CLOCK RECOVERY DEVICE FOR SERIAL DATA COMMUNICATION SYSTEM AND ITS METHOD
摘要 <p>PURPOSE: To use an embedded clock restored from a data signal by incrementally controlling the frequency (and hence the phase) of an oscillator voltage-controlled in response to the phase difference between an input data signal and a clock oscillator output. CONSTITUTION: A receiving data line 13 is connected with a decoder 35, and this decoder converts an NRZI code used on a serial link into a standard binary code, and this binary code is converted from serial data into parallel data by clocking data to a shift register 36. Input data are supplied through a line 40 to a clock control circuit 41, and the operation of a voltage-controlled oscillator 42 is controlled. An output 43 of the oscillator 42 is an in-local area clock used for operating the decoder 35 and the shift register 36.</p>
申请公布号 JPH03131138(A) 申请公布日期 1991.06.04
申请号 JP19900171305 申请日期 1990.06.28
申请人 DIGITAL EQUIP CORP <DEC> 发明人 DEIBUITSUDO SHII DEIBUISU;DONARUDO JII BUONADA
分类号 H04L7/033 主分类号 H04L7/033
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