| 摘要 |
A circuit for composing a still sub picture video image for a picture-in-picture (PIP) video display displaying a main picture and a sub picture in an area of the main picture includes a write address generator for storing in a memory the sub picture data of every second line of an input video image field so as to vertically compress the input image field data, along with a read address generator which reads-out the data stored at odd-numbered memory addresses in step with the horizontal sync signal of the first field of the main picture signal to compose a first video field of the sub picture display and which also reads out the data stored at even-numbered memory addresses in step with the horizontal sync signal of the second field of the main picture signal to compose a second video field of the sub picture display, enabling a sub picture consisting of first and second sub picture image fields but composed from the data of only a single input image field to be displayed in step with the corresponding first and second fields of the main picture. The circuit and corresponding method for composing a still video sub picture for PIP video displays compress the input image field data and require less memory capacity than conventional PIP display techniques while composing the two fields of the sub picture from data of a single input image field avoids picture shake in the displayed still sub picture.
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