| 摘要 |
<p>PURPOSE:To execute a communication between plural processors by only a comparatively simple handshake by executing two kinds of data transfers of a command report format and a direct memory access format. CONSTITUTION:In a main controller 11, a bus control circuit 15 connected to a processor 13 and a storage device 14 by an internal bus 12 is provided, and connected to an inter-processor bus 17. When a bus state is transferred to a direct memory access transfer state by a transition means, data stored in a transfer address of a storage device of the own side is sent out directly to a transfer address of a storage device of a peripheral equipment designated by a designating means. In this case, by only setting a transfer start address and the number of transfer bytes to the respective bus control means by these command transfer and report transfer, control of a competition of the bus and a data transfer by a direct memory access can be executed without interposing a processor. In such a way, by a comparatively simple handshake, a communication between the processors can be executed without imposing an excessive burden on a software.</p> |
