发明名称 TRANSDUCER SIGNAL CONDITIONING CIRCUIT
摘要 <p>The invention provides a transducer signal conditioning circuit for amplifying a transducer output signal (V1, V2), deducting an offset voltage and further amplifying the remaining signal voltage, the circuit comprising a differential in, differential out first amplifying stage (2), a differential summing amplifier second amplifying stage (3), and an offset voltage (preferably a temperature-dependent offset voltage) generating circuit (4). Particularly where the output signal is to be supplied to an A/D converter, the signal conditioning circuit may incorporate or be combined with circuitry for providing the A/D converter with a full scale reference voltage and an offset reference voltage which are ratiometric with the signal voltage.</p>
申请公布号 WO1991007815(A1) 申请公布日期 1991.05.30
申请号 GB1990001745 申请日期 1990.11.13
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