发明名称 Method for eliminating subharmonic false locking in sampler and frequency multiplier based source locking systems
摘要 A method for eliminating subharmonic false locking in a sampler and frequency multiplier phase-locked-loop source locking system comprising the modification of a prior known algorithm for determining the frequency of the first local oscillator used for controlling the sampling of the output of a source voltage controlled oscillator. The frequency of the first local oscillator is determined using prior algorithms for determining the lowest usable harmonic number H and the highest usable first oscillator frequency which will maximize sampler efficiency and minimize local oscillator phase noise due to frequency multiplication. Thereater, the harmonic number H as thus determined is modified depending upon whether when divided by a multiplication factor M, where M is the factor by which the frequency of the VCO is multiplied, the remainder thereof is equal to 1/M, 2/M or zero. If the remainder of the division step is zero, then H is increased by one. If the remainder of the division step is equal to 2/M, then H is increased by two. If the remainder of the division step is equal to 1/M, then the magnitude of H as initially calculated is not adjusted. After H has been calculated and, if necessary, adjusted as described above, it is then used to calculate the first local oscillator frequency using the remaining steps in the prior known algorithm.
申请公布号 US5019790(A) 申请公布日期 1991.05.28
申请号 US19900541586 申请日期 1990.06.21
申请人 WILTRON COMPANY 发明人 KAPETANIC, PETER M.
分类号 H03L7/20 主分类号 H03L7/20
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