发明名称 INPUT AMPLIFYING CIRCUIT
摘要 PURPOSE:To eliminate generation of electric noise by providing plural buffers each different in output connected in parallel, and a control circuit controlling the operating time of the buffers, and operating the buffers in the order of small output sequentially at each prescribed time. CONSTITUTION:Buffers 31, 32 whose outputs differ are provided and a control circuit 4 operates the buffers in the order of small output sequentially at a prescribed time. Since the buffer 31 with a small output is operated at first when the load is small, the rise speed of an input signal current is suppressed to a low value without generating the electric noise. When a large capacity load exists, the buffer 31 with a smaller output is operated at first, but since the output is small, slow reading speed may be caused. However, since the buffer 32 with a larger output is operated succeedingly, the rise of the input signal current is kept nearly the same rising speed as the case with the small capacitive load.
申请公布号 JPH03124119(A) 申请公布日期 1991.05.27
申请号 JP19890263341 申请日期 1989.10.09
申请人 FUJI ELECTRIC CO LTD 发明人 MATSUDA AKINORI
分类号 H03K17/16;H03K19/003;H03K19/0175 主分类号 H03K17/16
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