发明名称 |
SEMICONDUCTOR MEMORY DEVICE AND ITS LAYOUT SYSTEM |
摘要 |
<p>PURPOSE:To mask the parallel transfer to a data register in a bit unit, to simplify a memory area to be masked or display area at the read/write time by outputting the mask data provided on a part of memory array to a mask register receiving the data in parallel. CONSTITUTION:The area storing the mask information is provided on the memory array M-ARY and the mask information is transferred between the area and the mask register MR. Further by the output from the memory array M-ARY the parallel transfer to the serial output register SAM is executed to control the validity/invalidity in the bit unit. In such a manner, the memory area or the display area (wind display) masked at the read/write time through the serial input/output circuit is easily formed.</p> |
申请公布号 |
JPH03122890(A) |
申请公布日期 |
1991.05.24 |
申请号 |
JP19890327633 |
申请日期 |
1989.12.18 |
申请人 |
HITACHI LTD |
发明人 |
SATO KATSUYUKI;SHINODA KOJI;MIYAKE JUN;YUGAWA YOSUKE |
分类号 |
G11C11/41;G11C11/401;G11C11/409 |
主分类号 |
G11C11/41 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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