| 摘要 |
A circuit is provided for forming fixed length blocks of information units received from one network for transfer to another. The actual information from each serially received information unit is stored in a receive buffer. A block header register is provided to store the logical channel number, block byte count, and a bit map having locations corresponding with each of the actual information units stored in the receive buffer. Once all of the information units have been received, the header register provides its output to the receive buffer for storage in a header location. The receive buffer thus forms a fixed length block which can be transferred to another network for processing. <IMAGE> |
