发明名称 OUTPUT BUFFER CIRCUIT FOR INTEGRATED CIRCUIT
摘要 PURPOSE:To select the current ability of an output buffer circuit and to improve the characteristics of an integrated circuit or to reduce energy consumption by parallelly providing plural output units and setting some of the output units to a high impedance state according to a control signal. CONSTITUTION:A first output unit 41 composed of a CMOS inverter is provided and a second output unit 42 is provided parallelly with the first output unit 41 while including the serial connecting constitution of a pMOS transistor Mp2 and an nMOS transistor Mn2. Further, a control circuit 3 is provided to generate signals for inverting an input signal corresponding to the logical level of a control signal and impressing the signal to the gates of the pMOS transistor Mp2 and the nMOS transistor Mn2 or setting the second output unit 42 to the high impedance state. Thus, the output current can be changed and the optimum current can be supplied to respective various external loads. Then, the characteristic such as operating speed, etc., of the integrated circuit is improved and the energy consumption can be reduced.
申请公布号 JPH03117020(A) 申请公布日期 1991.05.17
申请号 JP19890254275 申请日期 1989.09.28
申请人 NEC CORP 发明人 OGATA YUKIHISA
分类号 H01L21/8238;G11C11/409;H01L27/092;H03K17/04;H03K19/0185 主分类号 H01L21/8238
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