| 摘要 |
PURPOSE:To obtain perfect CMOS type static RAMs integrated in a large scale and having the same parasitic capacitance by arranging the source-drain areas and gate electrodes of at least the first and second load MOSFETs, first and second driver MOSFETs, first and second transfer MOSFETs so that a symmetrical relation can be satisfied among the source-drain areas and gate electrodes. CONSTITUTION:The gate electrodes 11-16 of all MOS transistors Q1-Q6 are formed in parallel with each other. Connecting wires 37 and 38 for connecting each gate electrode to each source drain area are formed linearly and in parallel with each other The planar structure of the source drain area, gate electrode, and connecting wire of each MOS transistor is point symmetry about the center point C of this cell and, as a result, capacitance values of storage nodes become the same. When such constitution is used, the MOS transistors can be arranged closely to each other and the degree of integration of this semiconductor storage device can be improved. In addition since the planer structure is point symmetry and the structures of the parts where parasitic capacitances are accumulated are also symmetry to each other, the accumulated capacitances of the parts become the same and the storing state of this device is stabilized. |
