| 摘要 |
PURPOSE:To efficiently attain the development of a program and debugging by transmitting the address data which is stored by means of a control signal from an external part to a cache memory and rewriting data of a block in the address data to the main storage device of the external part. CONSTITUTION:When there is the data request of the block of a certain address from CPU 5, the cache memory 1 is retrieved based on the address data AD2. When information on the address data does not exist in the cache memory 1, data equivalent to the address data of the request is brought from the main storage device 20 in a block size unit. At that time, the optimum block is expelled from a tag memory part 12 and a data memory part 11, and the data in the expelled block is rewritten into the main storage device 20. Then the coincidence of the content of the main storage device 20 with that of the cache memory 1 is taken. Thus, the development of the program and debugging are efficiently executed. |
