发明名称 |
Low jitter DDFS FSK modulator |
摘要 |
A low jitter direct digital frequency synthesized frequency shift keyed modulator has a tapped delay line to provide polyphase sampling of an asynchronous data input signal. The samples from the tapped delay line are input to a correction signal generator that produces a correction signal as a function of the location of data transitions in the data input signal with respect to a specified point of a sample clock pulse. The correction signal is used to offset a modulating input to a direct digital frequency synthesizer so that the frequency shift keyed output reflects the data transitions within 1/n of the period of the sample clock pulse.
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申请公布号 |
US5016259(A) |
申请公布日期 |
1991.05.14 |
申请号 |
US19890319040 |
申请日期 |
1989.03.03 |
申请人 |
THE GRASS VALLEY GROUP, INC. |
发明人 |
HERSHBERGER, DAVID L. |
分类号 |
H04L27/12 |
主分类号 |
H04L27/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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