| 摘要 |
A method and apparatus of generating a clock pulse signal, which is shifted by any desired, settable phase value between 0 and - pi by using two conventional phase shifters which can be set continuously between 0 and - pi /2, wherein the two input ports of the first phase shifter are fed with the non-delayed frequency-halved signal and with the frequency-halved signal shifted in phase by - pi /2, respectively, and the two input ports of the second phase shifter are fed with the frequency-halved signal shifted in phase by - pi /2 and - pi , respectively. Both phase shifters are actuated jointly, and subsequently the frequency of the thus phase shifted output signals being doubled again. The output or input signals or both of them of the two controllable phase shifters are each filtered through lowpass filters in such a manner that possibly existing harmonics are attenuated in amplitude relative to the frequency-halved signal whereby dynamic behavior and frequency behavior are improved considerably.
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