Method of making a high performance MOS device having both P- and N-LDD regions using single photoresist mask

摘要

A method for making an integrated circuit structure having both PMOS and NMOS devices with lightly doped (LDD) source and drain regions is disclosed utilizing a single photoresist mask in which a substrate is implanted with a low concentration dopant of a first conductivity type through a silicon nitride shielding layer. Spacers are then formed against the sidewalls of oxide and nitride coated polysilicon gate electrodes by RIE etching of a polysilicon layer formed over the nitride shielding layer subsequent to the first implantation. A separate photoresist mask layer is then formed over a portion of the structure and the remaining exposed portions of the shielding nitride layer are then etched, resulting in the formation of first el-shaped shielding members against the sides of the gate electrodes. The exposed polysilicon spacers are then removed and the substrate is implanted with a high concentration dopant of a second conductivity type at an energy level insufficient to penetrate through the el-shaped nitride spacer to form conventional source/drain regions in the substrate.