| 摘要 |
An electrically programmable non-volatile memory comprises floating gate MOS transistors (T11, T12, T13) and an array of word lines (LM1 and LM2) along rows and bit lines (LB1, LB2 and LB3) along columns. A constant-potential line (B), arranged along a column so it is positioned between a pair of bit lines, connects the source electrodes (22) of the transistors, and includes a first conductivity type diffusion. A drain electrode (21) of the first conductivity type of each transistor extends along a column to form one of the bit lines (LB1, LB2, LB3). An insulating area (24) extends along a column on the side of each bit line opposite a constant-potential line (B). A conductive area (E) corresponding to the floating gate level covers insulating area (24).
|
