| 摘要 |
<p>PURPOSE:To attain the write of the correct data even if a power supply is interrupted while the data are written into the memory of a microprocessor by resetting a flip-flop with a memory cycle inhibiting signal and inactivating the chip selection signal of a CMOS memory. CONSTITUTION:If a microprocessor is executing a bus cycle when the drop of the main power voltage is detected, a memory cycle inhibiting signal KILLR is produced after the end of the bus cycle. Thus, the flip-flop 5 is reset and the chip selection signal *CS of a CMOS memory 1 is inactivated. Therefore the correct data can be written with no interruption caused in a relevant cycle only even if the power supply is interrupted while the microprocessor is writing the data into a memory.</p> |
