Shift register with series of bistable flip=flops - has write-in device for digital signal into first flip=flop, and read=out from last one

摘要

The shift register has a series of bistable flip-flops, and a device for writing a digital signal into the first flip-flop. It has a digital signal read-out from the last active flip-flop. The read-out has an adjusting facility for a number of active flip-flops. There is a third device, which holds continuously the not actuated flip-flops in a preset logic state. Pref. the write and read-out devices are so designed that the digital signal can be instantaneously read-out, without writing into the first flip-flop. USE/ADVANTAGE - Digital signal delay, with delay period adjustable between min and max. value, and with low loss performance.