| 发明名称 |
Method and apparatus for independently resetting processors and cache controllers in multiple processor systems. |
| 摘要 |
<p>A method and system for independently resetting primary and secondary processors 20 and 120 respectively under program control in a multiprocessor, cache memory system. Processors 20 and 120 are reset without causing cache memory controllers 24 and 124 to reset.</p> |
| 申请公布号 |
EP0426366(A2) |
申请公布日期 |
1991.05.08 |
| 申请号 |
EP19900311652 |
申请日期 |
1990.10.24 |
| 申请人 |
COMPAQ COMPUTER CORPORATION |
发明人 |
MILLER, DAVID A.;JANSEN, KENNETH A.;CULLEY, PAUL R.;TAYLOR, MARK E.;IZQUIERDO, JAVIER F. |
| 分类号 |
G06F1/24;G06F12/08;G06F15/177 |
主分类号 |
G06F1/24 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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