| 摘要 |
<p>PURPOSE:To supply outputs from two power supplies to one output terminal without level loss by connecting a capacitor and at least one MIS transistor (TR) between a gate of the MIS TR and a 2nd output circuit. CONSTITUTION:When an output is given from a 1st output circuit 7, a MISFET 5 connects between a 2nd output circuit 8 and an output terminal 3 so as to avoid current flowing from a 1st power supply VCC to a 2nd power supply VCC at a lower level than the level of the circuit 7 to. When an output of a 2nd output circuit 8 is brought also into a high level at the same time in the case of the output from the circuit 7, since a gate-source voltage of the FET 5 is nearly 0, the FET 5 is cut off, the circuit 8 is disconnected, and then no current flows thereto from the power supply VCC 1. When an output is given from the 2nd output circuit 8, since a level of the gate of the FET 5 is boosted by a bootstrap circuit comprising a MISFET 6 and a capacitor 4, a level loss or speed reduction due to the FET 5 is prevented by an output from the circuit 8.</p> |
