<p>A memory mapping and module enabling circuit for allowing logical 128 kbyte memory blocks to be defined for any location in any module (58) connected to a memory system. A RAM (126) is addressed by the system address lines defining 128 kbyte blocks, with the output data (TA, RASEN*) providing the row address strobe enable signals for a particular memory module and the address values necessary to place the 128 kbyte block within the module (58). Various other parameters such as write protect status (HWP) and memory location (HLOCMEM*) are also provided by the RAM. Circuits and techniques for programming and reading the RAM are provided.</p>
申请公布号
EP0426386(A2)
申请公布日期
1991.05.08
申请号
EP19900311749
申请日期
1990.10.26
申请人
COMPAQ COMPUTER CORPORATION
发明人
THAYER, JOHN S.;MAYER, DALE J.;LANDRY, JOHN A.;IZQUIERDO, JAVIER F.;CULLEY, PAUL R.