| 摘要 |
In a data processing system which is for use in combination with at least one peripheral device and comprises an input-output processor connected to a first and a second bus, a main memory connected to the first bus, a peripheral controller connected to the second bus and the peripheral device, and a central processor connected to the first bus and coupled to the second bus through the input-output processor, the peripheral controller requests data transfer between the main memory and the peripheral device. For this purpose, the peripheral controller produces a translation request signal in response to a channel command which is stored in a local memory of the peripheral controller from the main memory through the input-output processor and indicates the data transfer. Receiving the translation request signal through the input-output processor, the central processor translates into a physical data address a logical data address which accompanies the channel command and is stored in the local memory from the main memory. On transferring data from the main memory to the peripheral device, the peripheral controller produces a read command signal in response to the physical data address received through the input-output processor. In a similar manner, the peripheral controller produces a write command signal on transferring data from the peripheral device to the main memory.
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