发明名称 Stack design for processor.
摘要 <p>Items (eg. graphic orders) are written into the stack area of system memory of a processor (eg. a graphics processor) beginning at the limit pointer at the highest memory address in the stack area, so that the stack is formed in a descending direction toward the initial pointer at the lowest memory address in the stack area. In response to a pop order, the orders are read from the stack area in an ascending direction from the current pointer and are executed in sequence until a stack marker or branch order is encountered. To accomplish this reading and execution at a high speed, a prefetching buffer used to accelerate the processing of graphic orders stored elsewhere in the system memory is redirected to the top of the stack to load the contents into the buffer. To maintain compatibility with the previous design in which the stack was formed upwardly from the initial pointer, an appropriate conversion is made for any data transfer between the current pointer register and a user-accessible location.</p>
申请公布号 EP0425188(A2) 申请公布日期 1991.05.02
申请号 EP19900311391 申请日期 1990.10.17
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 LAWLESS, JOHN JOSEPH
分类号 G06F12/00;G06F7/78;G06F9/42;G11C7/00 主分类号 G06F12/00
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