| 摘要 |
<p>PURPOSE:To make the size of a memory cell small and improve the scale of integration by a method wherein a 1st electrode, an insulating film having a charge storage function, a semiconductor layer, and a 2nd electrode are stacked on an insulating substrate to make a memory element, the 2nd electrode is connected to an address line and a data line is connected to the 2nd electrode to make a memory array. CONSTITUTION:In a memory cell 20, a lower electrode 22 is formed on an insulating substrate consisting of glass and the like and further, an intrinsic amorphous Si film 24, an n<+> type amorphous Si film 25 for ohmic contact, and an upper electrode 26 are stacked on the lower electrode 22 through an SiN insulating film 23. Then the SiN insulating film 23 constitutes a fixed capacitance part and the amorphous Si film 24 constitutes a variable capacitance part. Further, a trap level is increased by using an SiN film in which the composition ration of a silicon atom Si to a nitrogen atom N becomes larger than its stoichiometry ratio as the SiN insulating film 23 and memory functions are fulfilled.</p> |
