发明名称 FAULTY DEVICE DIAGNOSTIC SYSTEM
摘要 PURPOSE:To elucidate the history of trouble occurrence to specify the device having the highest probability of trouble occurrence by sensing a halt state signal to a device SVP from each device at each time of the occurrence of the halt state and updating the address in each stage of the occurrence of the halt state of each device to store it by the device SVP. CONSTITUTION:The device SVP 5 which controls the whole of a computer system is provided with a halt state display register 13 where the halt state due to trouble of each device is stored at each time of the occurrence of the half state and means 14 and 15 where the halt state of each device is stored in the occurrence order. The address is counted up by one by a +1 address generating circuit 15 to store contents of the halt state display register 13 in a memory 14, thereby discriminating the order in which respective devices are set to the halt state. Therefore, the device as the factor of trouble and devices which are faulty by an influence of this device are discriminated, and faulty devices and the trouble position are easily specified.
申请公布号 JPH03103933(A) 申请公布日期 1991.04.30
申请号 JP19890242961 申请日期 1989.09.19
申请人 FUJITSU LTD 发明人 SHIMAMURA MASAYOSHI
分类号 G06F11/34;G06F11/22 主分类号 G06F11/34
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