| 摘要 |
The orderly powering down of a computer, in the event of a power interruption, is accomplished with a capability that senses the power interruption and supplies an independent source of power, together with and for the duration of a special austere orderly powering down series of instructions to the computer that terminates external interfaces and places all work in process in permanent memory with an indication that the interruption took place. The independent source of power and the sensing portions of the capability may be mounted in a subassembly compatible with the structure of the particular computer involved and the source of instructions may be placed in the computer memory.
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