发明名称 Semiconductor memory device comprising capacitor portions having stacked structures
摘要 A dynamic random access memory comprises a semiconductor substrate of a first conductivity type, a plurality of work lines, a plurality of bit lines, a plurality of active regions and a plurality of memory cells. The word lines extend in a first direction on a major surface of the semiconductor substrate. The bit lines are formed on the word lines and extend in a second direction intersecting with the first direction. The plurality of active regions are formed spaced apart at least at a predetermined interval in a third direction intersecting with the first and the second directions. Each of the active regions substantially forms a plane rectangle. The memory cells are arranged at intersection points of the word lines and the bit lines. Each memory cell comprises one and the other impurity regions of a second conductivity type, a gate electrode connected to the word lines, a storage node and a cell plate. The storage node is in contact with the other impurity region and is located above the bit line. An active region constituting a memory cell can be formed with a simple pattern layout related to lattices comprising word lines and bit lines without using a complicated pattern layout, in order to arrange the bit lines in an lower layer portion of a capacitor.
申请公布号 US5012309(A) 申请公布日期 1991.04.30
申请号 US19900512230 申请日期 1990.04.20
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 NAKAYAMA, AKIO
分类号 H01L27/04;H01L21/822;H01L21/8242;H01L27/10;H01L27/108;H01L29/78 主分类号 H01L27/04
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