| 摘要 |
A circuit arrangement for adaptively distortions of digital signals in line-conducted data transmissions as specified. For this purpose, a controllable capacitance (6) in the receiver is inserted into the transmission path, the output voltage of which is measured and evaluated to determine its polarity which is clocked into a latch 9. The capacitance (6) is continuously loaded in the direction of compensation by an integrator (10) which integrates the latch output supplying a control voltage, so that the best possible restoration of the signals is always ensured. <IMAGE> |
