| 摘要 |
PURPOSE:To reduce the accumulated charge at the time of saturation of a transistor so as to shorten the writing time by putting the collector and base junction of a vertical bipolar transistor in hetero junction, using the uppermost layer of this transistor where a memory cell is formed as a collector. CONSTITUTION:An n-type buried diffusion layer 2 to become an emitter, a p-type base diffusion layer 7, and an n-type collector diffusion layer 9 are formed in an Si substrate 1, and thereon a fine crystal Si11, which has wider band gap than the base diffusion layer 7 and to which n-type impurities are added, is accumulated. Moreover, the SBD is a shielded type SBD shielded from the Si substrate 1 by a p-type diffusion layer 8, and there an n-type buried diffusion layer 3, a p-type diffusion layer 8 to shield the SBD, and an n-type diffusion layer 10 to become the cathode of SBD are formed, and thereon a metallic electrode 15 is accumulated to form SBD. These, the collector regions 9 and 11 of a transistor and the cathode region 10 of SBD, are connected by a polycrystalline Si film 12 where n-type impurities are diffused. Hereby, the charges accumulated in the regions 9 and 11 at the time of saturation of a transistor can be reduced, and the writing operation to invert a flip flop circuit can be quickened. |
