发明名称 Time multiplexed system for tightly coupling pipelined processors to separate shared instruction and data storage units
摘要 This invention speeds up the execution of instructions in an information processing system by tightly coupling two or more processors to a random access storage mechanism in such a manner that no arbitration is required and no processor is forced to wait while another processor accesses the storage mechanism. This is accomplished by coupling the processors to the storage mechanism in a time multiplexed manner which enables each processor to have a periodic regularly occurring turn at accessing the storage mechanism.
申请公布号 US5010476(A) 申请公布日期 1991.04.23
申请号 US19860876625 申请日期 1986.06.20
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 DAVIS, GORDON T.
分类号 G06F15/167;G06F12/00;G06F13/16;G06F13/18 主分类号 G06F15/167
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