发明名称 Method and apparatus for transferring vector data between parallel processing system with registers & logic for inter-processor data communication independents of processing operations
摘要 A parallel processor system having a plurality of processor elements includes transfer information generation circuit for generating transfer information by adding to vector data a data identifier for the vector data and a destination processor element number, transmission circuit for sending the transfer information to a data communication path, receive circuit for holding the transfer information sent from the data communication path, and vector register for continuously reading related element data from the receive circuit based on the data identifiers generated by the transfer information generation circuit.
申请公布号 US5010477(A) 申请公布日期 1991.04.23
申请号 US19870109293 申请日期 1987.10.15
申请人 HITACHI, LTD. 发明人 OMODA, KOICHIRO;TANAKA, TERUO;NAKAGOSHI, JUNJI;HAMANAKA, NAOKI;NAGASHIMA, SHIGEO
分类号 G06F15/80 主分类号 G06F15/80
代理机构 代理人
主权项
地址