发明名称 METHOD OF TESTING INTEGRATED CIRCUIT DEVICE AND INTEGRATED CIRCUIT DEVICE PREFERRED TO BE TESTED BY THE SAME
摘要 PURPOSE: To generate a test pattern and conduct a test in a short time by selectively testing respective specified macros or bypassing the macros under the control of an overall macro test mode control signal. CONSTITUTION: A test control block TCB 110 receives signals MTR, MTM, and MTE from an overall control level and sends a ready signal READY back. This TCB 110 sends a signal Pro-ena to TCBs 112 and 114 of next low level and receives signals Ready from the TCBs 112 and 114. The TCBs 112 and 114 receive overall control signals MTR and MTM having no index and control processors 116 and 118 respectively. The processors 116 and 118 receives bus control block BCB control signals from the TCBs 112 and 114 and control output buffers 132 and 134 to send a bus control block signal to a BCB control bus 136.
申请公布号 JPH0396879(A) 申请公布日期 1991.04.22
申请号 JP19900220144 申请日期 1990.08.23
申请人 PHILIPS GLOEILAMPENFAB:NV 发明人 FURANSHISUKASU PETORUSU MARIA BEENKERU;ROBERUTASU UIRUHERUMUSU KORUNERISU DETSUKERU;RIDEI JIYOSEFUIINU JIYURIAN SUTAN;MATSUKUSU FUAN DERU SUTARU
分类号 G01R31/317;G01R31/28;G01R31/3185;G06F11/22 主分类号 G01R31/317
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