发明名称 DIAGNOSTIC SYSTEM FOR FAIL-SAFE CIRCUIT
摘要 PURPOSE:To detect the abnormality of a fail-safe circuit itself in a simple constitution without deteriorating the functions of the fail-safe circuit and a control circuit by providing a diagnostic period signal generating circuit to produce a diagnostic period signal having the prescribed time width. CONSTITUTION:A CPU 1, a watchdog timer 2, and a mode timer 4 are reset by a power-on reset signal, the inverse of POC. The timer 4 outputs the diagnostic period signal STBY of the prescribed time width to the CPU 1 and the timer 2 respectively. Thus the timer 2 and the CPU 1 are set in a diagnostic mode, and the timer 2 stops the fail-safe diagnostic action to the CPU 1. Then the CPU 1 outputs a test pattern signal DIAGN and inputs it to the timer 2 via an AND gate 5 while the signal STBY is kept at a high level. Then the presence or absence of the abnormality of the timer 2 is detected by a diagnostic result signal (answer signal) DIAGI outputted from the time-out output Q2 of the timer 2. As a result, the abnormality of a fail-safe circuit is detected without deteriorating the functions of the fail-safe circuit itself and the CPU 1.
申请公布号 JPH0395636(A) 申请公布日期 1991.04.22
申请号 JP19890233353 申请日期 1989.09.08
申请人 NISSAN MOTOR CO LTD 发明人 MATSUMOTO TAKASHI;ISHIKAWA MASAHIRO;KANEKO MITSUO
分类号 G06F11/22;G06F11/30 主分类号 G06F11/22
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