发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To sharply increase a charge amount which can be accumulated, to secure a required resistant property to an alpha-ray soft error and to secure other margins by a method wherein a groove-shaped capacitor of a memory cell is formed as a two-layer structure. CONSTITUTION:A semiconductor integrated circuit device is provided with a memory cell composed of a groove-shaped capacitor and of a MOS transistor which controls a charge and discharge operation of the groove-shaped capacitor. In the device, said groove-shaped capacitor is provided with the following: a diffusion region 12 formed on the surface of a semiconductor substrate 10 in a groove part; a first thin insulating film 13 formed on an inner wall of the groove; a first conductor layer 11 formed on the insulating film 13; a second thin insulating film 14 formed on the conductor layer 11; and a second conductor layer 15 formed on the second insulating film 14. Said second conductor layer 15 is connected to said diffusion region 12 at the bottom of the groove. For example, a drain region 18 of said MOS transistor is formed collectively with said diffusion region 12.
申请公布号 JPH0396274(A) 申请公布日期 1991.04.22
申请号 JP19890233482 申请日期 1989.09.08
申请人 NEC CORP 发明人 KOSHIMARU SHIGERU
分类号 H01L27/04;H01L21/822;H01L21/8242;H01L27/10;H01L27/108 主分类号 H01L27/04
代理机构 代理人
主权项
地址