Direct memory access monitoring system - has controller providing continuous cycle stealing access via buses

摘要

The DMA control system has a data processing unit (1), a RAM (2), an address output unit (3), a bus access controller (14), four I/O units (12), data, address and control buses (4-6), an I/O unit (12) and a DMA controller (17). The latter has a transfer counter (9) and a request signal generator (10) comprising of bistable multivibrators. Coupled to the generator is a transfer pulse generator (11) that receives an input from a multi-input OR-gate (13) with inputs supplied from I/O stages. The memory access operates on a cycle stealing basis to execute requests continuously. ADVANTAGE - Eliminates pre-processing period to improve bus effectiveness.