| 摘要 |
PURPOSE:To increase the data transfer speed by dividing the back-up data included in various information into blocks, writing these blocks of data into a transfer goal address via a DMA controller based on its data via an exclusive bus, and checking the addition of there written data. CONSTITUTION:A microprocessing unit MPU 10 turns the data requiring the back-up among those data undergone various processes into blocks and then sets these blocks into a 1st storage 30. The transfer start address in the back-up data, the data length, and the transfer goal address in a 2nd storage 40 are recorded into a 3rd storage means 60. Then the MPU 10 sets the data if recorded in the means 60 to a DMA controller DMAC 20. The DMAC 20 reads the data on the transfer start address to record it into the transfer goal address of the storage 40 via an exclusive bus 70. An addition means 80 carries out the sum check of the recorded data. As a result, the data can be transferred at a high speed. |
