发明名称 VERTICAL OSCILLATION CIRCUIT
摘要 PURPOSE:To reduce secular change due to a capacitor by generating a satisfactory sawtooth wave with linearity. CONSTITUTION:A horizontal synchronizing signal (a) and a vertical synchronizing signal (b) are inputted to a phase locked loop(PLL) circuit 1, and a clock pulse signal (c) and a reset pulse signal (d) are obtained, then, they are inputted to a counter 2. The counter 2 inputs output (g) to a ROM 3, and the field signal (e) of the PLL circuit 1 is inputted to the least significant bit of the ROM 3. Data of sawtooth wave is written on the ROM 3, and output data (h) is outputted as a step shape sawtooth wave via a D/A converter 4. At a first field and a second field, step shape waves with different size only by one LSB can be obtained by reading out the data of the odd address of the ROM 3 at a first field and the data of the even address at a second field with the field signal (e) to be inputted to the ROM 3.
申请公布号 JPH0379162(A) 申请公布日期 1991.04.04
申请号 JP19890218039 申请日期 1989.08.22
申请人 FUJITSU GENERAL LTD 发明人 KONDO SATORU
分类号 H04N3/16;H04N3/23 主分类号 H04N3/16
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