发明名称 FET INPUT CIRCUIT TRIMMING
摘要 <p>In an FET differential input, preferably using a quad set of devices according to the teaching of U.S. Patent 3,729,666, the channel of each transistor is formed in a piecewise manner, of multiple segments. Each channel segment is associated with a corresponding drain segment (i.e., these are multi-drain devices). Each drain segment is connected in series with a thin-film resistor. The channel area associated with each drain segment can be selectively removed from the circuit by cutting the connected resistor with a laser. The device's channel area (and its effective width to length ratio, Z/L) is thereby alterable. The thin film resistors are cut as the offset is measured, until an acceptably low (effectively zero) offset is obtained. This trimming operation can be performed at room temperature, and yields not only a near zero offset voltage, but also near zero drift. CMRR, further, will be maximized. Neither operating current ratio nor drain voltage need be, or is, changed.</p>
申请公布号 WO1991004576(A1) 申请公布日期 1991.04.04
申请号 US1990005296 申请日期 1990.09.18
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