| 摘要 |
<p>Comparators (102, 103, 104) are provided for monitoring a data write request output from CPU (101) to a keyboard controller (KBC) 113, and a request for inhibiting a memory access of 1MB or more. Circuits (106, 107, 108, 110, 111, 112, 114) are provided for generating a memory access disabling signal for disabling a memory access of 1MB or more in response to the detection of the requests by the comparators. The memory access disabling signal is transmitted to the memory and KBC 113.</p> |
