| 摘要 |
PURPOSE:To shorten the overall test time by incorporating a writing test ROM of an EPROM to attain a writing test via an internal CPU, eliminating an expensive tester and writing the data into plural chips simultaneously. CONSTITUTION:A ROM 10 receives an access only in a 3rd mode and works in the 3rd mode. Then the data are written into an internal EPROM 2 with an instruction written into the ROM 10. Simultaneously, a prober which performs a writing job inputs only the control signal required for a writing action to a chip. Thus it is not required to use an expensive tester which produces externally the addresses and the data at the writing test of the EPROM 2 in a wafer test state. Furthermore the data can be simultaneously written into plural chip at a high speed. |
